# Chery Details Ziwei Chip Series: C100 Central Compute, S1500 SiC and M-Series Control Chips

Chery presented its Ziwei chip lineup, comprising the C-series central computing chip, S-series automotive-grade silicon carbide chips and M-series automotive-grade control chips\. The C100 central compute chip delivers 2400TOPS of vehicle NPU compute with two chips and supports deployment of 100B-parameter models, while the S1500 SiC chip has entered mass production on 8-inch wafers\.

By China EV Signal
Published: 2026-10-23T14:25:38.347Z
Updated: 2026-10-23T14:25:38.349Z
Canonical article: https://chinaevsignal.com/news/chery-ziwei-chip-series-c100-s1500-sic

## Key takeaways

- Chery's Ziwei chip series includes the C-series central computing chip, S-series automotive-grade SiC chips and M-series automotive-grade control chips\.
- The Ziwei C100 uses two chips to reach 1000KDMIPS CPU compute, 2400TOPS vehicle NPU compute and 600GB/s memory bandwidth, and is certified to AEC-Q100 with ASIL-B across the chip and an ASIL-D safety island at Grade 2\.
- The Ziwei S1500 SiC chip has a 1500V drain-source voltage rating, 1450A module current capability and 2μs short-circuit withstand time, and has entered mass production on 8-inch wafers with more than 30% cost reduction from 8-inch production\.

## Three chip lines under Ziwei

Chery's Ziwei chip family covers three lines: the C-series central computing chip, the S-series automotive-grade silicon carbide chip and the M-series automotive-grade control chip\. Chery describes the Ziwei chips as building an independently controllable chip system\.

The C100 central compute chip is designed for physical AI deployment at the edge and is deeply adapted to CheryMind\.

## Ziwei C100 compute and memory

With two chips, the Ziwei C100 reaches 1000KDMIPS of CPU compute, which Chery says is close to a single mid-range server CPU\. Two chips also provide 2400TOPS of vehicle NPU compute, supporting deployment of 100B-parameter models, and memory bandwidth is 600GB/s\.

The C100 uses a multi-core heterogeneous architecture combining CPU, NPU and VDSP with a unified memory architecture\. Chery says the chip is tailored for 100B physical-world models and achieves an 80ms end-to-end algorithm loop\.

Against industry benchmarks, Chery cites bandwidth roughly 2\.2 times higher, compute roughly 1\.2 times higher and image processing roughly 1\.5 times higher\.

## Ziwei C100 safety certification

The Ziwei C100 carries AEC-Q100 automotive qualification\. Its safety level is ASIL-B across the full chip, with an ASIL-D safety island at Grade 2\.

## Ziwei S1500 SiC specifications

The Ziwei S1500 silicon carbide chip has a 1500V drain-source voltage rating, which Chery describes as the industry's highest automotive-grade voltage class\. Its module current capability is 1450A and its specific on-resistance Rsp is 2\.0mΩ·cm²\.

The S1500 reaches a maximum efficiency of at least 99\.6% and a maximum junction temperature Tjmax of 200℃\. Its short-circuit withstand time is 2μs, meeting automotive ASIL-D safety requirements\.

The S1500 has entered mass production on 8-inch wafers, and 8-inch production reduces cost by more than 30%\.

## Company coverage

- [Chery news](https://chinaevsignal.com/manufacturers/chery)

## Original publisher

奇瑞汽车. Published: 2026-10-23T12:03:23.000Z